胡名起

Mingqi Hu

资深AI编译器工程师 @ 英特尔

Senior AI Compiler Engineer @ Intel

关于我 About Me

About Me 关于我

我当前在英特尔(base上海)是一名资深的AI编译器工程师, 专注于英特尔VPU/NPU芯片编译器研发逾五年, 深度参与了Intel NPU 第二代到第五代的编译器开发工作(Gen2~Gen5产品代号为Keembay,Meteor Lake,Lunar Lake,Panther Lake), 包括图优化,Tiling策略自动生成,Copy/DMA优化,静态地址分配及安全Barrier等重要工作. 期间撰写国际专利两篇, AI Everywhere会议论文一篇, 荣获两次部门表彰奖(DRA).

我硕士毕业于东南大学计算机学院, 师从周德宇教授, 在模式学习与挖掘实验室(PALM)从事了三年的NLP多模态/文本生成图像方向的研究, 期间在ACML国际会议发表论文一篇并作口头报告,在AI顶级期刊KBS发表论文一篇, 另发表相关发明专利三篇. 本科毕业于南京理工大学计算机学院, 软件工程专业, 在李旻先副教授指导下的图像检索相关工作获校优秀毕业论文, 后保送东南大学攻读硕士研究生.

I am currently a senior AI compiler engineer at Intel (based in Shanghai), with over five years of experience specializing in the development of compilers for Intel VPU/NPU chips. I have been deeply involved in the development of compilers from the second to the fifth generation of Intel NPU (Gen2~Gen5, codenamed Keembay, Meteor Lake, Lunar Lake, Panther Lake). My work includes important tasks such as graph optimization, automatic generation of tiling strategies, Copy/DMA optimization, static address allocation, and secure barriers. During this period, I have authored two international patents and one paper for the AI Everywhere conference and have received two Departmental Recognition Awards (DRA).

I graduated with a master's degree from the School of Computer Science at Southeast University, under the supervision of Professor Deyu Zhou. I spent three years conducting research in the Pattern Learning and Mining Laboratory (PALM) focusing on NLP multimodal/text-to-image generation. During this time, I published a paper and delivered an oral presentation at the ACML international conference and published another paper in the top AI journal KBS, as well as three related invention patents. I completed my undergraduate studies at the School of Computer Science, Nanjing University of Science and Technology, majoring in Software Engineering. Under the guidance of Associate Professor Minxian Li, my work on image retrieval received the university's Outstanding Thesis Award, after which I was recommended for admission to Southeast University to pursue a master's degree.

项目经历 Projects

Projects 项目经历

Intel NPU 编译器研发 @ 英特尔 (2020-2025)

Intel NPU Compiler Development @ Intel (2020-2025)

  • 作为NPU编译器核心开发者, 深度参与并设计了初代NN compiler(代号MCM), 实现了Openvino IR下的神经网络模型自动编译,优化和blob生成. 于2021年将其迁入MLIR生态, 主持开发了第一套空间Tiling策略自动分配算法, 大幅提高了CI模型性能并沿用至今不断迭代. 第一次将NN cost model引入编译器, 建立cost-based 的Tiling 策略评判机制, 实现定量选择最优策略并不断扩展完善至今, 成为编译器的关键高级特性之一.
  • 参与NPU编译器的整体架构设计维护及每代关键特性的实现, 是代码库的核心贡献者和维护者, 长期负责PRs的审核与合并.
  • 负责客户模型的性能调优, 以微软为例, 帮助微软的PS/MEP/Copilot+模型在Intel NPUs上获得最佳性能和体验, 包括模型的编译时间优化, 模型输出准确度修复, 模型性能瓶颈分析和优化. 在全球NPU团队的通力合作下, 击败高通成为微软的第一合作伙伴!

以上工作内容涉及到的历代NPU产品为: Keembay,Meteor Lake,Lunar Lake,Panther Lake. 其中Keembay是第二代独立产品, 三代以后的NPU产品以集成形式存在于Intel Core Ultra处理器中, 可视为iNPU类似于集显iGPU.

  • As a core developer of the NPU compiler, I was deeply involved in and designed the first-generation NN compiler (codenamed MCM). I implemented the automatic compilation, optimization, and blob generation of neural network models under the OpenVINO IR. In 2021, I migrated it into the MLIR ecosystem and led the development of the first automatic spatial tiling strategy allocation algorithm, significantly improving the performance of CI models. This algorithm has been continuously iterated and used ever since. I was the first to introduce the NN cost model into the compiler, establishing a cost-based tiling strategy evaluation mechanism. This enabled the quantitative selection of the optimal strategy, which has been continuously expanded and improved to this day, becoming one of the key advanced features of the compiler.
  • I have been involved in the overall architecture design and maintenance of the NPU compiler, as well as the implementation of key features for each generation. As a core contributor and maintainer of the codebase, I have been responsible for the long-term review and merging of PRs (pull requests).
  • I have been responsible for performance tuning of customer models. Taking Microsoft as an example, I helped Microsoft's PS/MEP/Copilot+ models achieve the best performance and experience on Intel NPUs, including optimizing model compilation time, fixing model output accuracy, and analyzing and optimizing model performance bottlenecks. With the joint efforts of the global NPU team, we defeated Qualcomm to become Microsoft's primary partner!

The NPU products involved in the above work include Keembay, Meteor Lake, Lunar Lake, and Panther Lake. Keembay is the second-generation standalone product, while NPUs from the third generation onwards are integrated into Intel Core Ultra processors, similar to how iNPU is akin to integrated graphics iGPU.

著作 Publications

Publications 著作

联系方式 Contact

Contact 联系方式

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邮箱: mingqi_hu@163.com
Email: mingqi.hu.2025@gmail.com
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脉脉: 胡名起
maimai: 胡名起
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GitHub@Intel: Mingqi2
GitHub@Intel: Mingqi2
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GitHub@SEU: HuMingqi
GitHub@SEU: HuMingqi
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地址: 上海市闵行区紫竹高新区
Location: Shanghai Minhang District Zizhu High-tech Park